View HT9302D_362757.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

HT9302 Series
1-Memory/2-Memory Tone/Pulse Dialer
Features
* Universal specification * Operating voltage: 2.0V~5.5V * Low standby current * Low memory retention current: 0.1mA (typ.) * Tone/pulse switchable * Interface with LCD driver * 32 digits for redialing * 32 digits for SA memory dialing * One-key redialing * Pause and P(R)T key for PBX * 44 keyboard matrix * 3.58MHz crystal or ceramic resonator
Patent Number: 64097, 86474, 64529, 113235 (R.O.C.) 5424740 (U.S.A.)
* Hand-free control * Hold-line control * Pause, P(R)T can be saved for redialing * Lock function * Resistor options - M/B ratio - Flash function and flash time - Pause and P(R)T duration - Pulse number
* HT9302A: 18-pin DIP package
HT9302B: 22-pin SKDIP package HT9302C: 20-pin DIP package HT9302D: 24-pin SKDIP package HT9302G: 16-pin DIP package
General Description
The HT9302 series tone/pulse dialers are CMOS LSIs for telecommunication systems. They are designed to meet various dialing specifications through resistor option matrix. The HT9302 series provide the pin-selected lock function, Hold-line, Hand-free and LCD dialing number display interface, all of which are suitable for feature phone applications. HT9302G is simpler than HT9302X version. It provides only a redialing memory for simple low-cost system applications.
Selection Table
Function Part No. HT9302x HT9302A HT9302B HT9302C HT9302D HT9302G HT9302G 3/4 3/4 O O O O 3/4 O 3/4 O Lock Function (Pin Selection) Hold Line Hand Free (Normal version) 3/4 O 3/4 O (Simple version) 3/4 3/4 16 DIP 3/4 3/4 O O 18 DIP 22 SKDIP 20 DIP 24 SKDIP LCD Interface Package
Rev. 1.10
1
August 17, 2001
HT9302 Series
Block Diagram
C1 Key C o lu m n C4
FSM
C o n tro l
C heck
DOUT CLO C K Tone O ut P u ls e O ut DTM F PO XM UTE
Key F u n c tio n E ncoder
W RM C o u n te r ADDRL
SRAM
Tone E ncoder C o n v e rte r
R1 Key Row R4
E ncoder F la s h D ebounce C lo c k C o n tro l M o d e In H D /H F HKS HFI HDI HDO HFO T im e r K e y to n e G e n e ra to r LO C K MODE
X1 X2
D iv id e r
C lo c k G e n e ra to r
M /B
Pin Assignment
HT9302x normal version
HDI HDI C1 C1 1 2 3 4 5 6 7 8 9 C2 C3 C4 LO CK X1 X2 XM UTE VSS 18 17 16 15 14 13 12 11 10 R4 R3 R2 R1 MODE DTM F PO HKS VDD C2 C3 C4 LO CK X1 X2 XM UTE VSS HFI 9 10 11 8 7 6 5 4 3 2 1 22 21 20 19 18 17 16 15 14 13 12 HDO R4 R3 R2 R1 MODE DTM F PO HKS VDD HFO C1 1 2 3 4 5 6 7 8 9 10 C2 C3 C4 LO CK X1 X2 XM UTE VSS DOUT 20 19 18 17 16 15 14 13 12 11 R4 R3 R2 R1 MODE DTM F PO HKS VDD CLO CK C1 C2 C3 C4 LO CK X1 X2 XM UTE VSS HFI DOUT 9 10 11 12 8 7 6 5 4 3 2 1 24 23 22 21 20 19 18 17 16 15 14 13 HDO R4 R3 R2 R1 MODE DTM F PO HKS VDD HFO CLO CK
HT9302A 1 8 D IP -A
HT9302B 2 2 S K D IP -A
HT9302C 2 0 D IP -A
HT9302D 2 4 S K D IP -A
HT9302G simple version
C1 1 2 3 4 5 6 7 8 C2 C3 X1 X2 XM UTE VSS VDD
16 15 14 13 12 11 10 9
R4 R3 R2 R1 MODE DTM F PO HKS
HT9302G 1 6 D IP -A
Rev. 1.10
2
August 17, 2001
HT9302 Series
Keyboard Information
H T 9 3 0 2 A /B /C /D
C1 R1 R2 R3 R4 7 * /T 0 4 8 # 1 5 9 R C2 2 6 P C3 3 C4 SA F R1 R2 R3 R4 7 * /T 0 4 8 # R
HT9302G
C1 1 5 9 P C2 2 6 F C3 3
HKS
Pin Description
Pin Name I/O Internal Connection Description
C1~C4 R1~R4
These pins form a 44 keyboard matrix which can perform keyboard input detection and dialing specification setting functions. When on-hook (HKS=high) all the pins are set high. While off-hook the column group (C1~C4) remains low and the row group (R1~R4) is set high for key input detection. An inexpensive single contact 44 keyboard can be used as an input device. I/O CMOS IN/OUT Pressing a key connects a single column to a single row, and actuates the system oscillator that results in a dialing signal output. If more than two keys are pressed at the same time, no response occurs. The key-in debounce time is 20ms. Refer to the keyboard information for keyboard arrangement and to the functional description for dialing specification selection. I O The system oscillator consists of an inverter, a bias resistor and the necessary load capacitor on chip. Connecting a standard 3.579545MHz crystal or ceramic OSCILLATOR resonator to the X1 and X2 terminals can implement the oscillator function. The oscillator is turned off in the standby mode, and is actuated whenever a keyboard entry is detected. NMOS OUT XMUTE is an NMOS open drain structure pulled to VSS during dialing signal transmission. Otherwise, it is an open circuit. The XMUTE is used to mute the speech circuit when transmitting the dial signal. This pin is used to monitor the status of the hook-switch and its combination with HFI/HDI can control the PO pin output to make or break the line. HKS=VDD: On-hook state (PO=low). Except for HFI/HDI (hand-free/hold-line control input), other functions are all disabled. HKS=VSS: Off-hook state (PO=high). The chip is in the standby mode and ready to receive the key input. This pin is a CMOS output structure, which by receiving HKS and HFO/HDO signals, control the dialer to connect or disconnect the telephone line. PO outputs a low to break the line when HKS is high (on-hook) and HFO/HDO is low. PO outputs a high to make the line when HKS is low (off-hook) or HFO is high or HDO is high. During the off-hook state, the pin also outputs the dialing pulse train in pulse mode dialing. While in the tone mode, this pin is always high.
X1 X2
XMUTE
O
HKS
I
CMOS IN
PO
O
CMOS OUT
MODE
This is a three-state input/output pin, used for dialing mode selection whether Tone mode or Pulse mode; 10pps/20pps. MODE=VDD: Pulse mode, 10pps MODE=OPEN: Pulse mode, 20pps I/O CMOS IN/OUT MODE=VSS: Tone mode During pulse mode dialing, switching this pin to the tone mode changes the subsequent digit entry to tone mode. When the chips are in tone mode, switching to the pulse mode will also be recognized.
Rev. 1.10
3
August 17, 2001
HT9302 Series
Pin Name I/O Internal Connection CMOS OUT Description This pin is active only when the chip transmits tone dialing signals. Otherwise, it always outputs a low. The pin outputs tone signals to drive the external transmitter amplifier circuit. The load resistor should not be less than 5kW. This pin is a Schmitt trigger input structure. Active low. Applying a negative going pulse to this pin can toggle the HDO output once. An external RC network is recommended for input debouncing. The Pull-high resistance is 200kW typ. The HDO is a CMOS output structure. Its output is toggle- controlled by a negative transition on HDI. When HDO is toggled high, PO keeps high to hold the line. The hold function can be released by setting HFO high or by an on-off hook operation or by another HDI input. The HDO pin can directly drive the HT3810 series melody generator to produce a hold-line background melody. Refer to the functional description for the hold-line function. This pin is a Schmitt trigger input structure. Active high. Applying a positive going pulse to HFI can toggle the HFO once and hence control the hand-free function. The Pull-low resistance of HFI is 200kW typ. An external RC network is recommended for input debouncing. The HFO is a CMOS output structure. Its output is toggle- controlled by a positive transition on HFI pin. When HFO is high, the hand-free function is enabled and PO outputs a high to connect the line. The hand-free function can be released by setting HDO high or by an on-off-hook operation or by another HFI input. Refer to the functional description for the hand-free functional operation.
DTMF
O
HDI
I
CMOS IN Pull-high
HDO
O
CMOS OUT
HFI
I
CMOS IN Pull-low
HFO
O
CMOS OUT
LOCK
This is a three-state input/output pin, used for controlling long distance call function with a lock-switch. I/O CMOS IN/OUT LOCK=OPEN: Normal dialing (no lock) LOCK=VDD: 0, 9 is inhibited for use as the first key input LOCK=VSS: 0 is inhibited for use as the first key input O NMOS OUT NMOS open drain output pin. It outputs the BCD code of the dialing digits to the LCD driver chip (HT16XX series) or mC for dialing number display. Refer to the functional description for the detailed timing. NMOS open drain output. When dialing, it outputs a series of pulse trains for DOUT data synchronization. DOUT data is valid at the falling edge of clock. Positive power supply, 2.0V~5.5V for normal operation Negative power supply, ground
DOUT
CLOCK VDD VSS
O 3/4 3/4
NMOS OUT 3/4 3/4
Approximate internal connection circuits
C M O S IN /O U T
V
DD
NMOS OUT
C M O S IN
CMOS OUT
V
DD
C M O S IN P u ll- h ig h
V
DD
C M O S IN P u ll- lo w
X1
O S C IL L A T O R
X2 10M W
20pF
10pF
Rev. 1.10
4
August 17, 2001
HT9302 Series
Absolute Maximum Ratings
Supply Voltage ...........................................-0.3V to 6V Input Voltage .............................. VSS-0.3 to VDD+0.3V Storage Temperature ...........................-50C to 125C Operating Temperature ..........................-20C to 75C
Note: These are stress ratings only. Stresses exceeding the range specified under Absolute Maximum Ratings may cause substantial damage to the device. Functional operation of this device at other conditions beyond those listed in the specification is not implied and prolonged exposure to extreme conditions may affect device reliability.
Electrical Characteristics
Symbol VDD IDD ISTB VR IR VIL VIH IXMO IOLXM IHKS RHFI RHDI IOH1 IOL1 IOH2 IOL2 IOH3 IOL3 tFP tRP tDB tBRK fOSC Parameter Operating Voltage Operating Current Standby Current Memory Retention Voltage Memory Retention Current Input Low Voltage Input High Voltage XMUTE Leakage Current XMUTE Sink Current HKS Pin Input Current HFI Pull-low Resistance HDI Pull-high Resistance Keypad Pin Source Current Keypad Pin Sink Current HFO Pin Source Current HFO Pin Sink Current HDO Pin Source Current HDO Pin Sink Current Pause Time After Flash One-key Redialing Pause Time Key-in Debounce Time Break Time for One-key Redialing System Frequency Test Conditions VDD 3/4 2.5V 1V 3/4 1V 3/4 3/4 3/4 On-hook 3/4 3/4 VXMUTE=12V No entry Pulse Tone Conditions 3/4 Off-hook Keypad entry No load Min. 2 3/4 3/4 3/4 1 3/4 VSS 0.8VDD 3/4 1 3/4 3/4 3/4 -4 200 -1 1 -1 1 3/4 3/4 3/4 3/4 3/4 3.5759
fOSC=3.5795MHz, Ta=25C Typ. 3/4 0.2 0.6 3/4 3/4 0.1 3/4 3/4 3/4 3/4 3/4 200 200 3/4 400 3/4 3/4 3/4 3/4 0.2 1 1 20 1.2 3.5795 Max. 5.5 1 2 1 5.5 0.2 0.2VDD VDD 1 3/4 0.1 3/4 3/4 40 3/4 3/4 3/4 3/4 3/4 3/4 3/4 3/4 3/4 3/4 3.5831 Unit V mA mA mA V mA V V mA mA mA kW kW mA mA mA mA mA mA s s ms s MHz
On-hook, no load No entry 3/4
2.5V VXMUTE=0.5V 2.5V VHKS=2.5V 2.5V VHFI=2.5V 2.5V VHDI=0V 2.5V VOH=0V 2.5V VOL=2.5V 2.5V VOH=2V 2.5V VOL=0.5V 2.5V VOH=2V 2.5V VOL=0.5V 3/4 3/4 3/4 3/4 3/4 Control key Digit key One-key redialing 3/4 One-key redialing Crystal=3.5795MHz
Rev. 1.10
5
August 17, 2001
HT9302 Series
Pulse Mode Electrical Characteristics
Symbol IPOH IPOL PR Parameter Test Conditions VDD Conditions Min. -0.2 0.2 3/4 3/4 3/4 3/4 3/4 3/4 3/4 3/4 3/4 3/4 3/4 3/4 fOSC=3.5795MHz, Ta=25C Typ. 3/4 0.6 10 20 33:66 40:60 40 (10pps) 20 (20pps) 33 (10pps) 17 (20pps) 800 500 33 (10pps) 17 (20pps) 40 (10pps) 20 (20pps) 66 (10pps) 33 (20pps) 60 (10pps) 30 (20pps) Max. 3/4 3/4 3/4 3/4 3/4 % 3/4 3/4 ms 3/4 3/4 3/4 3/4 ms 3/4 3/4 ms 3/4 ms Unit mA mA pps
PO Output Source Current 2.5V VOH=2V PO Output Sink Current Pulse Rate 2.5V VOL=0.5V 3/4 MODE pin is connected to VDD MODE pin is opened A resistor is linked between R2 and C1 No resistor is linked between R2 and C1 M/B ratio=40:60
M/B
Make/Break Ratio
3/4
tPDP
Pre-digit-pause Time
3/4 M/B ratio=33:66
tIDP
Inter-digit-pause Time
3/4
Pulse rate=10pps Pulse rate=20pps A resistor is linked between R2 and C1 No resistor is linked between R2 and C1 A resistor is linked between R2 and C1 No resistor is linked between R2 and C1
tM
Pulse Make Duration
3/4
tB
Pulse Break Duration
3/4
Tone Mode Electrical Characteristics
Symbol VTDC ITOL VTAC RL ACR THD tTMIN tITPM Parameter DTMF Output DC Level DTMF Sink Current DTMF Output AC Level DTMF Output Load Column Pre-emphasis Tone Signal Distortion Minimum Tone Duration Minimum Inter-tone Pause Test Conditions VDD 3/4 3/4 Conditions 3/4 Row group, RL=5kW Min. 0.45VDD 0.1 0.12 5 1 3/4 Others 9302G Others 9302G 3/4 3/4 3/4 3/4
fOSC=3.5795MHz, Ta=25C Typ. 3/4 3/4 0.155 3/4 2 -30 82.5 100 85.5 106 Max. 0.7VDD 3/4 0.18 3/4 3 -23 3/4 3/4 3/4 3/4 Unit V mA Vrms kW dB dB ms ms
2.5V VDTMF=0.5V 2.5V THD-23dB 2.5V Row group=0dB 2.5V RL=5kW 3/4 3/4 Auto-redial Auto-redial
THD (Distortion) (dB) = 20 log (
V12 + V22 + K Vn 2 / Vi 2 + Vh 2
)
Vi, Vh: Row group and column group signals V1, V2, ... Vn: Harmonic signals (BW=300Hz~3500Hz)
Rev. 1.10
6
August 17, 2001
HT9302 Series
Functional Description
Keyboard matrix C1~C4 and R1~R4 form a keyboard matrix. Together with a standard 44 keyboard, the keyboard matrix is used for dialing entries. In addition, the keyboard matrix provides resistor option for different dialing specification selections. The keyboard arrangement for each of the HT9302 series are shown in the Keyboard Information. Tone frequency Tone Name R1 R2 R3 R4 C1 C2 C3 Output Frequency (Hz) Specified 697 770 852 941 1209 1336 1477 Actual 699 766 847 948 1215 1332 1472 % Error +0.29% -0.52% -0.59% +0.74% +0.50% -0.30% -0.34% Pause and P(R)T duration selection table RK21 No Yes tP (sec) 3.6 2 tP(R)T (sec) 3.6 1 M/B ratio selection table RK12 No Yes M/B Ratio (%) 40:60 33.3:66.6
Flash function/time (duration) selection table RK13 No No Yes Yes RK14 No Yes No Yes Flash Function Control Digit Digit Digit Flash Time (tF) 600ms 600ms 98ms 300ms
Note: % Error does not contain the crystal frequency drift Dialing specification selection By means of adding resistors on the keyboard matrix pins, various dialing specifications can be selected. The allowable option resistor connections are shown.
C1 R1 R2 R3 R4 R R R
K12
Pulse number selection table
* This table shows pulse number selections for
HT9302x. RK31 No No Yes
RK41 No Yes No Yes
Pulse Number N N+1 10-N 3/4
C2 R
C3 R
C4 R
K21
K31
K41
Yes
* HT9302G has different selection method listed in the
K13
table below.
RK31 No Yes
Pulse Number N 10-N
K14
All the resistors are 330kW. The resistor option functions and the default specifications (without option resistors) are listed below. Option Resistor RK12 RK13 RK14 RK21 RK31 RK41 Option Function Make/Break Ratio Selection Default (No Resistor) 40:60
Flash Function and Flash=control function Flash Time Selection Flash time=600ms Pause & P(R)T Duration Selection Pulse Number Selection tP=3.6s tP(R)T=3.6s N
Rev. 1.10
7
August 17, 2001
HT9302 Series
Pulse number table Keypad Digit Key 1 2 3 4 5 6 7 8 9 0 */T # Output Pulse Number Normal N 1 2 3 4 5 6 7 8 9 10 P(R)T Ignored New Zealand (10-N) 9 8 7 6 5 4 3 2 1 10 P(R)T Ignored Sweden/ Denmark (N+1) 2 3 4 5 6 7 8 9 10 1
H H H L L L L X X L H X : D o n 't c a r e A n:U nchanged H L X X L H L X L H L X X L X L L H L H
Hold-line function operation
* Hold-line function execution
When HDO is low, a falling edge triggers the HDI, enabling the Hold-line function (HDO becomes high). The XMUTE remains low when HDO is high.
* Reset Hold-line function
When HDO is high, the Hold-line function is enabled and can be reset by:

Off-hook Applying a falling edge to HDI Changing the HFO pin from low to high
* Hold-line function table
C u rre n t S ta te HKS H L X L HDO L X L HFO HFI L
In p u t HDI H HKS An
N e x t S ta te HDO L H L L L H L An L HFO An L An L An L An An H
An An L An An An H An
P(R)T Ignored
Hand-free function operation
* Hand-free function execution
When HFO is low, a rising edge triggers the HFI, enabling the Hand-free function (HFO becomes high).
* Reset Hand-free function
When HFO is high, the Hand-free function is enabled and can be reset by: Off-hook

H : L o g ic H IG H L : L o g ic L O W
: R is in g e d g e : F a llin g e d g e
Applying a rising edge to HFI Changing the HDO pin from low to high
DOUT BCD code When dialing, the corresponding 4-bit BCD codes are serially presented on DOUT from MSB to LSB. The data of DOUT is valid at the falling edge of the CLOCK pin. The following table lists the BCD codes corresponding to the keyboard input. Key-In 1 2 3 4 5 6 7
L L
* Hand-free function table
C u rre n t S ta te HKS H H H H L L L L X X L H L X X H L X H H X X L L X H H H L X H HFO L X H HDO HDI H
In p u t HFI L HKS An
N e x t S ta te HFO L H L L L H L An L HDO An L An
BCD Code 0001 0010 0011 0100 0101 0110 0111
Key-In 8 9 0 */T # F P
BCD Code 1000 1001 1010 1101 1100 1011 1110
An An L L L An An An L L H An
An
An An H
H : L o g ic H IG H L : L o g ic L O W
X : D o n 't c a r e A n:U nchanged
: R is in g e d g e : F a llin g e d g e
Rev. 1.10
8
August 17, 2001
HT9302 Series
LOCK function The function aims to detect locked dialing number to prevent a long distance call. The dialing output of the chip is disabled if the first input key after on-off-hook is the locked number when the lock function is enabled. The lock function selection is listed below.
* HT9302x version *F
The flash key can be selected as a digit or a control key by the option resistors RK13 & RK14. Pressing the flash key will force the PO pin to be low for the tF duration and is then followed by tFP (sec). tF can also be selected by RK13, RK14.
*P
LOCK Pin OPEN VDD VSS Key definition
* 0,1,2,3,4,5,6,7,8,9 keys
Function Normal dialing (no lock) 0, 9 is inhibited 0 is inhibited
Pause key. The execution of the pause key pauses the output for the tP duration. tP can be selected by RK21.
*R
Redial key. Executes redialing as well as one-key redial function.
* ST
These are dialing number input keys for both the pulse mode and the tone mode operations.
* */T
This key can store lock number with personal code in IDD lock operation.
* R/P
This key executes the P(R)T function and waits a tP(R)T duration in the pulse mode. On the other hand, the */T key executes the * function in the tone mode.
*#
Redial and pause function key. If it is pressed as the first key after off-hook, this key executes the redial function. Otherwise, it works as the pause key.
This is a dialing signal key for the tone mode only, no response in the pulse mode.
* SA
Pressing this key can save the preceding dialing telephone numbers. The saved number is redialed if it is pressed again. SA will also redial the saved number if it is the first key pressed at the off-hook state. During the dialing signal transmission, the SA key is inhibited.
Rev. 1.10
9
August 17, 2001
HT9302 Series
Keyboard operation The following operations are described under an on-off- hook or on-hook condition with the hand-free active condition.
* N o r m a l d ia lin g P u ls e m o d e D2 ... D n ( a ) w ith o u t * /T K e y b o a r d in p u t: D 1 D ia lin g o u tp u t: D 1 R M :D 1 D 2 ... D n S A M :U nchanged ( b ) w ith * /T K e y b o a r d in p u t: D ia lin g o u tp u t: D 1 RM :D 1 D 2 ... D n D1 Dm D 2 ... D n tP (R) T P u ls e * /T D n + 1 ... D m D n + 1 ... D m Tone D ia lin g o u tp u t: D 1 RM :D 1 D 2 ... D n S A M :U nchanged D2 ... D n * /T D n+1 ... D 2 ... D n Tone m ode ( a ) w ith o u t * /T K e y b o a r d in p u t: D 1 D ia lin g o u tp u t: D 1 R M :D 1 D 2 ... D n S A M :U nchanged ( b ) w ith * /T K e y b o a r d in p u t: D1 Dm D 2 ... D n * D n + 1 ... D m * D n + 1 ... D m D2 ... D n * /T D n+1 ... D2 ... D n D 2 ... D n
S A M :U nchanged
N o te : T h e m a x im u m c a p a c ity o f th e R M m e m o r y is 3 2 d ig its . W h e n m o r e th a n 3 2 d ig its a r e e n te r e d , th e s ig n a l is tr a n s m itte d b u t th e r e d ia l fu n c tio n is in h ib ite d . * R e d ia l P u ls e m o d e D 2 ... D n o r R /P ] D 2 ... D n ( a ) w ith o u t * /T RM c o n te n t: D 1 K e y b o a r d in p u t: [ R D ia lin g o u tp u t: D 1 R M :U nchanged S A M :U nchanged ( b ) w ith * /T R M c o n te n t: D 1 D 2 ... D n * /T D n + 1 ... D m
(R)T
Tone m ode ( a ) w ith o u t * /T RM c o n te n t: D 1 D 2 ... D n o r R /P ] D 2 ... D n K e y b o a r d in p u t: [ R D ia lin g o u tp u t: D 1 R M :U nchanged S A M :U nchanged ( b ) w ith * /T RM c o n te n t: D 1 D 2 ... D n * /T D n + 1 ... D m K e y b o a r d in p u t: [ R o r R /P ] D ia lin g o u tp u t: D 1 D 2 ... D n * D n + 1 ... D m R M :U nchanged S A M :U nchanged
K e y b o a r d in p u t: [ R o r R /P ] D ia lin g o u tp u t: D 1 D 2 ... D n tP P u ls e R M :U nchanged S A M :U nchanged
D n + 1 ... D m Tone
Rev. 1.10
10
August 17, 2001
HT9302 Series
* O n e - k e y r e d ia l P u ls e m o d e ( a ) w ith o u t * /T Tone m ode ( a ) w ith o u t * /T
K e y b o a r d in p u t: D 1
D ia lin g o u tp u t: D 1 D1 R M : D 1 D 2 ... D n S A M :U nchanged ( b ) w ith * /T K e y b o a r d in p u t: D 1
D2
... D n
RK
R
tR
P
K e y b o a r d in p u t: D 1
D2
... D n
tB
RK
R
tR
P
D 2 ... D n tB D 2 ... D n
D ia lin g o u tp u t: D 1 D 2 ... D n ... D n R M : D 1 D 2 ... D n S A M :U nchanged ( b ) w ith * /T K e y b o a r d in p u t: D 1
D1
D2
D2 R
... D n
* /T
D n+1
...
D2
... D n
* /T
D n+1
...
Dm
D ia lin g o u tp u t: D 1
R M :D 1
D 2 ... D n tP (R) T D n + 1 ... D m P u ls e Tone tB R K tR P D 1 D 2 ... D n tP (R) T P u ls e D n + 1 ... D m Tone D 2 ... D n * /T D n + 1 ... D m
Dm R D ia lin g o u tp u t: D 1 D 2 ... D n
tB R K tR ... D m
P
* D n + 1 ... D m D 2 ... D n * D n+1
D1
R M :D 1
D 2 ... D n
* D n + 1 ... D m
S A M :U nchanged
S A M :U nchanged
N o te : If th e d ia lin g n u m b e r e x c e e d s 3 2 d ig its , r e d ia lin g is in h ib ite d a n d P O = V D D
* S A copy P u ls e m o d e ( a ) w ith o u t * /T Tone m ode ( a ) w ith o u t * /T
K e y b o a r d in p u t: D 1
D ia lin g o u tp u t: D 1 RM:D1 SAM:D1 D 2 ... D n D 2 ... D n
D2
... D n
SA
K e y b o a r d in p u t: D 1
D ia lin g o u tp u t: D 1 RM:D1 SAM:D1 D 2 ... D n D 2 ... D n
D2
... D n
SA
D 2 ... D n
D 2 ... D n
( b ) w ith * /T K e y b o a r d in p u t: D 1
D2 SA
... D n
* /T
D n+1
...
( b ) w ith * /T K e y b o a r d in p u t: D 1
D2
... D n
*
* /T
D n+1
...
Dm
D ia lin g o u tp u t: D 1 RM:D1 SAM:D1 D 2 ... D n D 2 ... D n
D 2 ... D n tP (R) T D n + 1 ... D m P u ls e Tone * /T D n + 1 ... D m * /T D n + 1 ... D m
Dm D ia lin g o u tp u t: D 1
R M :D 1 SAM :D 1 D 2 ... D n D 2 ... D n
SA D 2 ... D n
D n + 1 ... D m
* D n + 1 ... D m * D n + 1 ... D m
N o te : T h e m a x im u m c a p a c ity o f th e R M m e m o r y is 3 2 d ig its . W h e n m o r e th a n 3 2 d ig its p lu s th e " S A " k e y a r e e n te r e d , th e S A V E fu n c tio n w ill n o t b e e x e c u te d , a n d a ll th e e x is tin g d a ta in th e s a v e m e m o r y w ill n o t b e c h a n g e d .
Rev. 1.10
11
August 17, 2001
HT9302 Series
* S A d ia lin g P u ls e m o d e D2 SA D 2 ... D n ... D n ( a ) w ith o u t * /T SAM c o n te n t: D 1 K e y b o a r d in p u t: D ia lin g o u tp u t: D 1 R M : U nchanged S A M : U nchanged ( b ) w ith * /T S A M c o n te n t: D 1 K e y b o a r d in p u t: D ia lin g o u tp u t: D 1 R M : U nchanged S A M : U nchanged * F la s h F la s h a s a d ig ita l k e y D1 Dm D2 ... D n tF tF
P
Tone m ode ( a ) w ith o u t * /T SAM c o n te n t: D 1 D 2 ... D n SA D 2 ... D n K e y b o a r d in p u t: D ia lin g o u tp u t: D 1 R M : U nchanged S A M : U nchanged ( b ) w ith * /T S A M c o n te n t: D 1
D 2 ... D n SA D 2 ... D n P u ls e
* /T tP
D n + 1 ... D m
(R)T
D 2 ... D n
* D n + 1 ... D m * D n + 1 ... D m
D n + 1 ... D m Tone
K e y b o a r d in p u t: S A D ia lin g o u tp u t: D 1 D 2 ... D n R M :U nchanged S A M :U nchanged
F la s h a s a c o n tr o l k e y K e y b o a r d in p u t: D1 Dm D2 ... D n T
F
( a ) T h e in te r v e n ie n t k e y K e y b o a r d in p u t: D ia lin g o u tp u t: D 1 Dm R M : D 1 D 2 ... D n S A M :U nchanged ( b ) T h e fir s t k e y K e y b o a r d in p u t: R M :U nchanged S A M :U nchanged * P ause K e y b o a r d in p u t: D ia lin g o u tp u t: D 1 R M :D 1 D 2 ... D n P S A M :U nchanged * N o te R M :R SAM: D1D2 Dn+1 e d ia l m S ave d ... D n : ... D m : e m o ry ia lin g m e m o r y 0~9 0 ~ 9 , *, # D1 D2 ... D n tP P Dn+1 ... D m D 2 ... D n D n + 1 ... D m F
P
F T
FP
Dn+1
...
F
Dn+1 D n + 1 ...
... D ia lin g o u tp u t: D 1 Dm R M : D n + 1 ... D m S A M :U nchanged N o te : T
F
D 2 ... D n
D n + 1 ...
D 2 ... D n
: b r e a k a fla s h tim e
D1 D1
D2
... D n
D ia lin g o u tp u t: tF tF
D 2 ... D n
D n + 1 ... D m
Rev. 1.10
12
August 17, 2001
HT9302 Series
Timing Diagrams
Normal dialing
* Pulse mode
H ig h Im p e d a n c e HKS
K E Y IN
D1 tD
B
D2 R tD
B
tD
B
O th e rs XM UTE
H T9302G XM UTE tP PO tB tM tM t ID P - t M
DP
t ID P - t M
t ID P - t M
tP
DP
t ID
P
tM
DTM F t ID P - t M X2 20m s 20m s
* Tone mode
H ig h Im p e d a n c e HKS
K E Y IN
D1 tD
B
D2 tD
B
R tD
B
XM UTE
PO t IT DTM F tT X2 20m s 20m s
M IN PM
t IT
PM
t IT
PM
t IT
PM
Rev. 1.10
13
August 17, 2001
HT9302 Series
Dialing with pause key
* Pulse mode
H ig h Im p e d a n c e HKS
K E Y IN
D1 tD
B
D2 P
D3 tP + tP
DP
O th e rs XM UTE t ID P - t M H T9302G XM UTE tP PO t ID
P
t ID P - t M
DP
tM
tM
DTM F
X2 20m s
* Tone mode
H ig h Im p e d a n c e HKS
K E Y IN
D1 tD
B
D2
P
D3 tP
XM UTE
PO tT DTM F t IT X2 20m s
PM M IN
t IT
PM
t IT
PM
Rev. 1.10
14
August 17, 2001
HT9302 Series
Flash key operation
H ig h Im p e d a n c e HKS
K E Y IN
F tD
B
XM UTE
PO tF DTM F tF
P
X2 20m s
Pulse(R)Tone operation
H ig h Im p e d a n c e HKS
K E Y IN tD
B
D1
D2
* /T
D3 t ID
P
tP (R)
T
XM UTE tP PO
DP
t ID
P
+ tP
DP
tT
M IN
t IT
PM
DTM F X2 20m s
Rev. 1.10
15
August 17, 2001
HT9302 Series
One key redial operation
H ig h Im p e d a n c e HKS
K E Y IN
D1 tD
B
D2 tD
B
R tD
B
t IT
PM
XM UTE
t IT
PM
t IT
PM
PO tB DTM F X2 20m s
RK
(1 .2 s e c s )
tR P (1 s e c )
t IT
PM
CLOCK & DOUT operation
H ig h Im p e d a n c e HKS
K E Y IN
D1
XM UTE tD
B
tP
DP
tB
tM
PO
CLO CK
fC
LO CK
= 2 .4 k H z
DOUT X2 20m s
D a ta
N o te : D 1 = D 3 = 3 D2=2
Rev. 1.10
16
August 17, 2001
HT9302 Series
T ip O ff-h o o k A92 O n -h o o k R in g 2 .2 k W 3 .3 k W 1N4148 V
DD
22M W 100kW
1 A b r id g e
100kW
1N4148
A42 5 .1 V 47kW 0 .1 m F
270kW 100mF 1mF
220kW 1 .5 k W 100kW 150W
12 1
R1
10 VDD
11
HKS
2 4 7 8 0 # R 18 9 P 17 5 6 F 16
3
SA
15
PO
DTM F
13
R2 R3 R4 C4
4
HT9302A
C3
3
XM UTE
8
SPEECH NETW ORK
* /T
C2
2
C1
1
LO CK 5 V 0,9
DD
VSS 9 Rk
MODE 14 VDD 10pps
X1 6
X2 7 3 .5 8 M H z re s o n a to r n o lo c k 20pps 10pF 0 10pF Tone 39pF 39pF
1mF
Rk
Application Circuits
Application circuit 1
Rev. 1.10
* R k fo r d ia lin g s ig (R e fe r to th e fu n * U n s p e c ifie d tr a n * A 1 m F c a p a c ito r
n a l o p tio c tio n a l d s is to r s a b e tw e e n
n e s c r ip tio n ) re o f 8 0 5 0 ty p e X M U T E a n d V S S ( G N D ) is r e c o m m e n d e d
17
August 17, 2001
HT9302 Series
O ff-h o o k T ip A92 100kW 4 .7 k W 33kW H T381XX 47kW 1N4148 x 4 10kW H a n d -fre e 0 .1 m F V
DD
22M W 100kW 220kW 330kW 0 .1 m F 2 .2 k W 1N4148 1N4148 220kW 22kW 22kW 5 .1 V 0 .1 m F 100kW 0 .1 m F 11 15 PO 22 1 HDO HDI 100mF 13 VDD 14 47kW 270kW 150W 1 .5 k W 1mF 16V 1N4148
O n -h o o k
R in g 100kW 3 .3 k W A42 H o ld
1 A b r id g e
10mF 50V 220kW
1N4148
1mF
0 .0 2 m F
1
R1
2 4 7 8 0 # R 21 9 P 20 5 6 F 19
3
SA
18
HFI
HKS
DTM F
16
R2 R3 R4 C4
5
HT9302B
C3
4
HFO
XM UTE
12 9 SPEECH NETW ORK
* /T
C2
3
C1
2
LO CK 6 V 0,9
DD
VSS MODE 17 10
X1 VDD 10pps 7
X2 8 3 .5 8 M H z re s o n a to r n o lo c k 20pps 10pF 0 10pF Tone 39pF 39pF
1mF
Rk
Rk
Application circuit 2
Rev. 1.10
* R k fo r d ia lin g s ig n a l o p tio n ( R e fe r to th e fu n c tio n a l d e * U n s p e c ifie d tr a n s is to r s a r e * A 1 m F c a p a c ito r b e tw e e n X * T h e H T 3 8 1 X X (H T 3 8 1 0 s e
s c r ip of8 MUT r ie s )
tio n 050 Ea p ro
)
ty p e n d V S S ( G N D ) is r e c o m m e n d e d v id e s a m e lo d y d u r in g th e h o ld p e r io d
18
August 17, 2001
HT9302 Series
T ip O ff-h o o k A92 O n -h o o k R in g 2 .2 k W 3 .3 k W 1N4148 V
DD
22M W 100kW
1 A b r id g e
100kW
1N4148
A42 5 .1 V 47kW 0 .1 m F 270kW 100mF 1mF 12 VDD 13
HKS
220kW 1 .5 k W 100kW 150W
14 1
R1
2 4 7 8 0 # R 20 9 P 19 5 6 F 18
3
SA
17
PO
DTM F
15
R2 R3 R4 C4
4
HT9302C
C3
3
XM UTE
8 DOUT 10
SPEECH NETW ORK
* /T
C2
2
C1
1
LO CK 5 V 0,9 10pF 0
DD
VSS 9
MODE 16
X1 VDD 10pps 6
X2 7
CLO CK 11 3 .5 8 M H z re s o n a to r n o lo c k 10pF 20pps Tone 39pF 39pF
1mF 1N4148
Rk Rk
Application circuit 3
H T16XX L C D D R IV E R (s e e H T 1 6 X X d a ta )
Rev. 1.10
* R k fo r d ia lin g s ig (R e fe r to th e fu n * U n s p e c ifie d tr a n * A 1 m F c a p a c ito r
n a l o p tio c tio n a l d s is to r s a b e tw e e n
n e s c r ip tio n ) re o f 8 0 5 0 ty p e X M U T E a n d V S S ( G N D ) is r e c o m m e n d e d
19
August 17, 2001
HT9302 Series
O ff-h o o k T ip A92 100kW 100kW 3 .3 k W A42 10kW H a n d -fre e V 0 .1 m F H o ld 5 .1 V
DD
22M W 100kW 220kW 330kW 4 .7 k W 0 .1 m F 1mF 16V 2 .2 k W 1N4148 1N4148 x 4 22kW 22kW 0 .1 m F 1 HDO HDI 0 .1 m F 100mF 24 15 VDD 16 HKS 1N4148 DTM F 18 47kW 100kW 47kW 1N4148 220kW 270kW 1 .5 k W 150W H T381XX 47kW 1N4148
O n -h o o k
R in g 33kW
1 A b r id g e
10mF 50V 220kW
1N4148
1mF
0 .0 2 m F
11 17 1 4 5 6 F 21
R1
2
3
SA
20 HFI
PO
R2 R3 R4 C4 5 C3 4 C2 3 C1 2
LO CK 6
7 * /T 0 # R 23
8
9
P
22
HT9302D
VSS MODE 19 10 V 0,9
DD
HFO
XM UTE
14 9 X1 V DD 10pps 7 X2 8 DOUT CLO CK 13 3 .5 8 M H z re s o n a to r n o lo c k 20pps 0 10pF 10pF Tone 39pF 39pF 12 1mF SPEECH NETW ORK
Rk
Rk
Application circuit 4
H T16XX L C D D R IV E R (s e e H T 1 6 X X d a ta )
Rev. 1.10
* R k fo r d ia lin g s ig n a l o p tio n ( R e fe r to th e fu n c tio n a l d e * U n s p e c ifie d tr a n s is to r s a r e * A 1 m F c a p a c ito r b e tw e e n X * T h e H T 3 8 1 X X (H T 3 8 1 0 s e
s c r ip of8 MUT r ie s )
tio n 050 Ea p ro
)
ty p e n d V S S ( G N D ) is r e c o m m e n d e d v id e s a m e lo d y d u r in g th e h o ld p e r io d
20
August 17, 2001
HT9302 Series
T ip O ff-h o o k A92 O n -h o o k R in g 2 .2 k W 3 .3 k W 1N4148 V
DD
22M W 100kW
1 A b r id g e
100kW
1N4148
A42 5 .1 V 47kW 0 .1 m F 270kW 100mF 1mF 10 1 3 R1 R2 R3 R4 C3 3 C2 2 C1 1 VSS 7 5 6 8 9 0 # R 16 P 15 F 7 * /T 14 4 2 13 PO VDD 8 9 HKS
220kW 1 .5 k W 100kW 150W
DTM F
11
HT9302G
MODE 12 X1 VDD 10pps 20pps 10pF Tone 39pF 4 5 X2
XM UTE
6
SPEECH NETW ORK 1mF
Rk Rk
3 .5 8 M H z re s o n a to r 39pF
Application circuit 5
* R k fo r d ia lin g s ig (R e fe r to th e fu n * U n s p e c ifie d tr a n * A 1 m F c a p a c ito r
n a l o p tio c tio n a l d s is to r s a b e tw e e n
n e s c r ip tio n ) re o f 8 0 5 0 ty p e X M U T E a n d V S S ( G N D ) is r e c o m m e n d e d
Rev. 1.10
21
August 17, 2001
HT9302 Series
Holtek Semiconductor Inc. (Headquarters) No.3, Creation Rd. II, Science-based Industrial Park, Hsinchu, Taiwan Tel: 886-3-563-1999 Fax: 886-3-563-1189 Holtek Semiconductor Inc. (Sales Office) 11F, No.576, Sec.7 Chung Hsiao E. Rd., Taipei, Taiwan Tel: 886-2-2782-9635 Fax: 886-2-2782-9636 Fax: 886-2-2782-7128 (International sales hotline) Holtek Semiconductor (Hong Kong) Ltd. RM.711, Tower 2, Cheung Sha Wan Plaza, 833 Cheung Sha Wan Rd., Kowloon, Hong Kong Tel: 852-2-745-8288 Fax: 852-2-742-8657 Holtek Semiconductor (Shanghai) Inc. 7th Floor, Building 2, No.889, Yi Shan Rd., Shanghai, China Tel: 021-6485-5560 Fax: 021-6485-0313 Holmate Technology Corp. 48531 Warm Springs Boulevard, Suite 413, Fremont, CA 94539 Tel: 510-252-9880 Fax: 510-252-9885 Copyright O 2001 by HOLTEK SEMICONDUCTOR INC. The information appearing in this Data Sheet is believed to be accurate at the time of publication. However, Holtek assumes no responsibility arising from the use of the specifications described. The applications mentioned herein are used solely for the purpose of illustration and Holtek makes no warranty or representation that such applications will be suitable without further modification, nor recommends the use of its products for application that may present a risk to human life due to malfunction or otherwise. Holtek reserves the right to alter its products without prior notification. For the most up-to-date information, please visit our web site at http://www.holtek.com.tw.
Rev. 1.10
22
August 17, 2001

▲Up To Search▲

Price & Availability of HT9302D

	To Download HT9302D Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .